On May 25, Silego Technology Inc. announced that JARVISH , or JARVISH, has utilized Silego’s Configurable Mixed-signal ICs, (CMICs), in their latest smart helmet system, the JARVISH Smart Helmet JR.Silego’s CMIC devices integrate the discrete analog and digital circuitry that would otherwise make a helmet system too bulky and power hungry to be useful to motorcycle riders.
With wireless high speed algorithms, built-in sensors, voice command and synchronization with smartphones, JARVISH’s Smart Helmet allows motorcycle riders to enjoy features like navigation, telephony andactive protection system while on the road without the jeopardy of distraction. The groundbreaking product enhances the efficiency of protection helmets with new technologies that break through the limitation ofconventional designs, connect riders back to the world while on two wheels and brings in upfront proactive safety.
Silego is a pioneer and market leader in CMICs. Silego’s CMICs use Non-Volatile Memory to configure and integrate analog, digital logic and power functions, which allows design engineers to reduce power, cost,size and time to market. Since the introduction of CMICs, Silego has developed five generations of CMIC silicon and design tools. Each generation has added functionality and enhanced the design experience.
Said Don Merino, JARVISH’s EVP of Business Development: “JARVISH is pleased to be working with a pioneer and market leader like Silego. Developing a new platform like a Smart Helmet requires us to use cuttingedge technologies to reduce power, size and costs while meeting the time to market constraints of a fast-moving market. Silego provides the right solution for us, and we are excited to work with them.”
Mike Noonen, Silego’s Vice President of Worldwide Sales and Business Development, added “We are delighted to work with JARVISH. They are an extremely innovative company creating products that enhance themotorcycle rider’s safety and enjoyment. They have cleverly implemented Silego’s CMIC devices to reduce crucial size, power and time to market while increasing circuit protection. Silego is proud to work with such apioneering company, and we look forward to supporting JARVISH in future designs.”
Several of the space, power and cost savings functions integrated by Silego’s CMICs are used for power sequencing of an Intel Curie Module in the JARVISH product. These functions are described in a recently released application note from Intel: http://www.intel.com/content/dam/support/us/en/documents/boardsandkits/curie/curie-power- sequencing-app-note.pdf