A Technology research institute of CEA Tech, and its research partners have demonstrated a potentially scalable readout technique that could be fast enough for high-fidelity measurements in large arrays of quantum dots.
In a paper presented at IEDM 2019, the international research team reported its work on developing a toolkit on a SOI MOSFET-based prototyping platform that enables fast reading of the states of charge and spin. The study explored two gate-based reflectometry readout systems for probing charge and spin states in linear arrangements of MOS split-gate-defined arrays of quantum dots. The first system gives the exact number of charges entering the array and can help to initialize it. It can also read spin states, albeit in relatively small arrays. The second one gives the spin state in any quantum dot regardless of the array length, but is not useful for tracking charge number. Both readout schemes can be used complementarily in large arrays.
The study’s findings “bear significance for fast, high-fidelity, single-shot readout of large arrays of foundry-compatible Si MOS spin qubits,” the paper notes.
“The short-term efforts for our team going forward will be a joint optimization to increase speed and reliability of the readouts,” said CEA-Leti’s Louis Hutin, lead author on the paper. “The longer-term goal is to transfer this know-how on a larger scale and to less conventional architectures, featuring an optimized topology for error correction.”
Reflectometry is a technique that leverages signal reflections along a conducting line when an incident RF wave meets an impedance discontinuity. In CEA-Leti’s study, the probing line was connected to the MOS gate of a Si quantum dot. The system was prepared so that the load impedance depends on the spin state of the qubit, which enabled the team to monitor single spin events non-destructively and almost as they occurred.
In addition to CEA-Leti, the research team includes CNRS Institute Néel and CEA-IRIG, Grenoble, France; the Niels Bohr Institute, University of Copenhagen, Denmark; and Hitachi Cambridge Laboratory and Cavendish Laboratory, University of Cambridge, UK. Their paper is titled “Gate Reflectometry for Probing Charge and Spin States in Linear Si MOS Split-Gate Arrays”.
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