Designing high-speed analog signal chains from DC-to-wideband

    By: Rob Reeder

    analog_devicesAll the rage these days in the converter world is the GSPS or otherwise known as an RF-ADC. With such high sample rate converters available on the market this opens up the Nyquist by 10x as compared to 5 years ago. A lot has been discussed on the advantages of using RF-ADCs and how to design with them and capture data at such high rates. Thank you JESD204x consortium. But one consideration seems to be forgotten about, the lowly DC signal.

    The design of the input configuration, or “front end,” ahead of a high performance, analog-to-digital converter (ADC) is always critical to achieving the desired system performance. Typically the focus is capturing wideband, RF-y type frequencies, like bigger than a 1GHz. However, in some applications DC or near DC signals are also required and can be appreciated by the end user as they too carry important information. Therefore, optimizing the overall front end design to capture both DC and wideband signals requires a DC coupled front end that leads all the way down to the high-speed converter.

    Because of the nature of the application, an active front end design will need to be developed as using a passive front end or balun to couple the signals into the converter are inherently AC coupled. In this paper, an overview on the importance of common mode signals and how to properly level shift the amplifier front end will be presented in a real system solution example.

    Common mode: overview

    Many customer tech support questions still come in from customer when there is a lack of understanding for this parameter of what two devices are capable of. A/D converter datasheets specify a common-mode voltage requirement for the analog inputs. Not much detailed information is available on this subject, but the proper front-end bias must be maintained in order to achieve rated ADC’s performance at full scale.

    ADCs with integrated buffers typically have an internally biased common-mode (CM) level of half the supply plus a diode drop (AVDD/2+0.7V). No external circuitry is required to bias this circuit, but it must be maintained to properly use the converter. For un-buffered (e.g., switched-capacitor input) converters, the common-mode bias is typically half the analog supply, or AVDD/2. This can be supplied externally in a variety of ways. Some converters have a dedicated pin that allows the designer to provide bias through a couple of resistors tied to the analog inputs.

    Alternatively, the designer can connect the internal bias to a transformer’s center tap, or can use a resistor divider off the analog supply (a resistor from each leg of the analog inputs to AVDD and ground). Check the manufacturer’s datasheet or applications support group before using the converter’s VREF pin, as many references are not equipped to supply a common-mode bias without an external buffer. It is tempting because the CM voltage you need right there and handy, but be warned don’t do it!

    If the common-mode bias is not provided or maintained, the converter will have gain and offset errors that contribute to the overall measurement. The converter may “clip” early, or not at all because the converter’s full-scale cannot be reached. Common-mode bias is especially important when connecting an amplifier in front of the converter, especially if the application calls for DC coupling. Check the amplifier’s datasheet specifications to make sure the amplifier can meet the converter’s swing and common-mode supply requirements. Converters have been pushing to smaller geometry processes and therefore lower supplies.

    With a 1.8-V supply, a 0.9-V common-mode voltage is required by the amplifier if DC coupling is required. Amplifiers with 3.3-V to 5-V supply voltages may not be able to maintain that low a level, but newer low-voltage amplifiers can or the designer can use a split supply and using a negative rail on the Vss pins. However, when doing this, keep in mind other pins too may need to be connected to the negative rail. Consult the datasheet and/or the direct application support for the product to find out.

    Common mode: defined

    Let’s start with defining a CM voltage. Figure 1 shows how a converters “sees” differential and common mode signals. A CM voltage is simply the center point around which the signals move; see Figure 1. You can also think of this as the new center point or zero code. An amplifier, CM is established on the outputs, usually through a VOCM pin or similar. Be careful though, these pins have certain current and voltage range requirements too. Might be best to review the amplifier datasheet and/or use a robust bias point which doesn’t load down any adjacent circuitry or reference point within your circuit.

    Don’t simply tap off a converter’s voltage reference pin (VREF), which is usually half the converter’s full-scale, it may not be able to provide enough bias with good accuracy. It would be prudent to review the pin specifications here on the converter’s datasheet as well. Usually something like a simple voltage divider with 1% resistor tolerances and/or a buffer driver will do to set this CM bias properly for an amplifier.

    Figure 1 Differential and common mode signals example
    Figure 1 Differential and common mode signals example

    In Table 1, a quick summary of how to connect the amplifier and converter per application is listed below. As well as some proper circuit examples shown in Figure 2.

    Table 1: Common mode matrix


    Figure 2 Examples of AC vs. DC coupled applications for amplifier/converter front ends.
    Figure 2 Examples of AC vs. DC coupled applications for amplifier/converter front ends.


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