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    Unveiling the Implementation of ARINC 818-2 IP Core On Microsemi PolarFire FPGA

    The ARINC 818 video protocol since its inception has gained wide adoption on large aircrafts such as Airbus A350XWB, Boeing 787, KC46A, and many others. ARINC 818 protocol is used to provide point-to-point, high-speed, low-latency video transmission for mission-critical systems such as cockpit displays, video processors, cameras, and IR sensors. Offering high-speed ARINC 818 interfaces in FPGA arises many challenges due to low-latency and synchronous timing requirements for most displays.

    iWave Systems, being the leading FPGA design house, offers an extensive portfolio of FPGA IP Cores. And one of the most predominant being ARINC 818 IP. Today, we are excited to announce the successful implementation of iWave’s ARINC 818 IP Core on Microsemi PolarFire FPGA devices. The PolarFire devices offer the highest security, small form factor, flash-based FPGA, that consume 50% low power competing to mid-range FPGA’s.

    Key features include:

    • Fully compliant with ARINC 818-2 standards
    • Can be used for both transmit and receive applications
    • Flexible streaming video interface
    • Configurable ADVB video formats(resolution, pixel type, etc.)
    • Supports progressive and interlaced video formats
    • IP parameters can be configured as per the customers’ interface control document(ICD)
    • Transmission medium – either optical or copper

    The ARINC 818-2 complaint PolarFire FPGA evaluation kit is suitable for various high-performance applications and functionalities that include communication, military, aviation.
    With strong competence in FPGA, iWave Systems has demonstrated the seamless integration of iWave’s ARINC 818-2 IP transmitter and receiver functionality on Microsemi’s PolarFire FPGA evaluation kit.

    Demo description:

    FPGA Platform Microsemi PolarFire FPGA EVK
    FMC card Multi-video interface Add on FMC card
    HDMI Monitor To display the video output
    Fig 1.0: System architecture for external loopback test

    Fig 1.2: Demo implementation

    Demo: External loopback test

    The ARINC 818-2 IP transmitter block receives the video data generated by the internal test pattern generator and converts it into ADVB frames. These ADVB frames are sent out through an FPGA transceiver that is connected to the SFP module. These ADVB frames are looped back to the Rx channel via the SFP module, which is then decoded by the ARINC 818-2 IP receiver block to retrieve the video data and is then displayed on the HDMI monitor.

    The ARINC 818 protocol has become the effective standard for high-performance military and avionics video systems, and with this, we help our customers realize their ideas into reality with assured strong and unparalleled FPGA design-to-deployment competence.

    iWave Systems has also evaluated ARINC 818 IP Core across a wide range of Xilinx and Intel-based evaluation kits and has successfully licensed ARINC 818 IP to many of our esteemed clients around the world.

    For more information, visit

    ELE Times Research Desk
    ELE Times Research Desk
    ELE Times provides extensive global coverage of Electronics, Technology and the Market. In addition to providing in-depth articles, ELE Times attracts the industry’s largest, qualified and highly engaged audiences, who appreciate our timely, relevant content and popular formats. ELE Times helps you build experience, drive traffic, communicate your contributions to the right audience, generate leads and market your products favourably.

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